The present invention generally relates to etching silicon substrates, and particularly to a high-rate silicon chemical vapor etching process.
Semiconductor fabrication frequently utilizes various etching processes to form large features in silicon substrates. In some processes, these features include holes etched through the entirety of the silicon substrate. Exemplary features that do not etch fully through the substrate may include deep trench isolation and deep trench capacitors. Exemplary features that do etch fully through the substrate may include through-substrate vias (TSV). Etching large features in a silicon substrate may also be useful in the formation of devices containing DNA-sequencing nanopores.
However, silicon substrates may have thicknesses many times greater than the etch rate of typical etching processes, resulting in very long etch times to form the various features in the silicon substrate. Longer etch times may increase the overall fabrication time and therefore increase cost, decrease yield, or both. A method of increasing the etch rate of a silicon substrate may therefore be desirable.